Performance evaluation and implementations of MFCC, SVM and MLP algorithms in the FPGA board

One of the most difficult speech recognition tasks is accurate recognition of human-to-human communication. Advances in deep learning over the last few years have produced major speech improvements in recognition on the representative Switch-board conversational corpus. Word error rates that just a few years ago were 14% have dropped to 8.0%, then 6.6% and most recently 5.8%, and are now believed to be within striking range of human performance. This raises two issues - what is human performance, and how far down can we still drive speech recognition error rates? The main objective of this article is the development of a comparative study of the performance of Automatic Speech Recognition (ASR) algorithms using a database made up of a set of signals created by female and male speakers of different ages. We will also develop techniques for the Software and Hardware implementation of these algorithms and test them in an embedded electronic card based on a reconfigurable circuit (Field Programmable Gate Array FPGA). We will present an analysis of the results of classifications for the best Support Vector Machine architectures (SVM) and Artificial Neural Networks of Multi-Layer Perceptron (MLP). Following our analysis, we created NIOSII processors and we tested their operations as well as their characteristics. The characteristics of each processor are specified in this article (cost, size, speed, power consumption and complexity). At the end of this work, we physically implemented the architecture of the Mel Frequency Cepstral Coefficients (MFCC) extraction algorithm as well as the classification algorithm that provided the best results

A Vehicular Queue Length Measurement System in Real-Time Based on SSD Network

Vehicular queue length measurement is an important parameter to detect the traffic congestion, which is resulted from several issues such as traffic lights, accidents, and poor roads infrastructures. In this paper, a system in real-time is proposed to detect and measure the vehicular queue length at intersections. The proposed system consists of two main steps: the first step is the detection of queue by using frames differencing method to detect the motion in the target areas. If there is no a motion, then the second step is implemented to detect the vehicles in these areas by using Single Shot Multibox Detector (SSD) algorithm. If there are vehicles, that means the queue exists and the measurement process begins. Some modifications are applied on SSD algorithm to fit with in our system and to improve the accuracy of the vehicle detection process. The system is applied on videos obtained by stationary cameras. The experiments demonstrate that this system is able to accurately detect and measure the vehicular queue length